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1 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b features general features ? 16,777,216 x 8 / 8,388,608 x 16 switchable ? sector structure - 8kb(4kw) x 8 and 64kb(32kw) x 255 ? extra 128-word sector for security - features factory locked and identifiable, and customer lockable ? sector groups protection / chip unprotect - provides sector group protect function to prevent program or erase operation in the protected sector group - provides chip unprotect function to allow code changing - provides temporary sector group unprotect function for code changing in previously protected sector groups ? single power supply operation - 3.0 to 3.6 volt for read, erase, and program operations ? latch-up protected to 100ma from -1v to 1.5xvcc ? low vcc write inhibit : vcc <= vlko ? compatible with jedec standard - pinout and software compatible to single power supply flash performance ? high performance - fast access time: 90ns - fast program time: 11us/word (typical) - fast erase time: 1s/sector (typical) ? low power consumption - low active read current: 20ma (typical) at 5mhz - low standby current: 8ua (typical) ? typical 100,000 erase/program cycle ? 10 years data retention software features ? erase suspend/ erase resume - suspends sector erase operation to read data from or program data to another sector which is not being erased ? status reply - data# polling & toggle bits provide detection of program and erase operation completion ? support common flash interface (cfi) hardware features ? ready/busy# (ry/by#) output - provides a hardware method of detecting program and erase operation completion ? hardware reset (reset#) input - provides a hardware method to reset the internal state machine to read mode ? wp#/acc input pin - hardware write protect pin/provides accelerated program capability package ? 48-pin tsop ? 56-pin tsop ? 70-pin ssop ? all pb-free devices are rohs compliant 128m-bit [16m x 8/8m x 16] single voltage 3v only flash memory
2 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b pin configuration 56 tsop 48 tsop a15 a14 a13 a12 a11 a10 a9 a8 a19 a20 we# reset# a21 wp#/acc a22 a18 a17 a7 a6 a5 a4 a3 a2 a1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 a16 byte# gnd q15/a-1 q7 q14 q6 q13 q5 q12 q4 v cc q11 q3 q10 q2 q9 q1 q8 q0 oe# gnd ce# a0 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 nc a22 a15 a14 a13 a12 a11 a10 a9 a8 a19 a20 we# reset# a21 wp#/acc ry/by# a18 a17 a7 a6 a5 a4 a3 a2 a1 nc nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 nc nc a16 byte# gnd q15/a-1 q7 q14 q6 q13 q5 q12 q4 v cc q11 q3 q10 q2 q9 q1 q8 q0 oe# gnd ce# a0 nc v cc 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
3 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b symbol pin name a0~a22 address input q0~q14 data inputs/outputs q15/a-1 q15(word mode)/lsb addr(byte mode) ce# chip enable input we# write enable input oe# output enable input reset# hardware reset pin, active low wp#/acc h ardw are write protect/programming acceleration input ry/by# read/busy output byte# selects 8 bits or 16 bits mode vcc +3.0v single power supply gnd device ground nc pin not connected internally pin description 70 ssop 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 a20 a21 a18 a17 oe# a6 a5 a4 a3 a2 a1 a0 byte# nc nc nc nc nc nc nc nc nc ce# gnd gnd a7 q0 q8 q1 q9 q2 q10 q3 q11 nc a19 a8 a15 a10 a11 a12 a13 a14 a9 a16 we# nc a22 nc nc nc nc wp#/acc nc nc nc nc reset# gnd gnd q15/a-1 q7 q14 q6 q13 q5 q12 q4 vcc vcc
4 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b logic symbol 16 or 8 q0-q15 (a-1) ry/by# a0-a22 ce# oe# we# reset# wp#/acc byte# 23
5 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b block diagram control input logic program/erase high voltage write s tat e machine (wsm) s tat e register flash array x-decoder address latch and buffer y-pass gate y-decoder array source hv command data decoder command data latch i/o buffer pgm data hv program data latch sense amplifier q0-q15/a-1 a0-am am: msb address ce# oe# we# reset# byte# wp#/acc
6 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b block diagram description the block diagram on page 4 illustrates a simplified architecture of mx29lv128d t/b. each block in the block diagram represents one or more circuit modules in the real chip used to access, erase, program, and read the memory array. the "control input logic" block receives input pins ce#, oe#, we#, reset#, byte#, and wp#/acc. it creates internal timing control signals according to the input pins and outputs to the "address latch and buffer" to latch the external address pins a0-am(a22). the internal addresses are output from this block to the main array and decoders composed of "x-decoder", "y-decoder", "y-pass gate", and "flash array". the x-decoder decodes the word-lines of the flash array, while the y-decoder decodes the bit-lines of the flash array. the bit lines are electrically connected to the "sense amplifier" and "pgm data hv" selectively through the y-pass gates. sense amplifiers are used to read out the contents of the flash memory, while the "pgm data hv" block is used to selectively deliver high power to bit-lines during programming. the "i/o buffer" controls the input and output on the q0-q15/a-1 pads. during read operation, the i/o buffer receives data from sense amplifiers and drives the output pads accordingly. in the last cycle of program command, the i/o buffer transmits the data on q0-q15/a- 1 to "program data latch", which controls the high power drivers in "pgm data hv" to selectively program the bits in a word or byte according to the user input pattern. the "program/erase high voltage" block comprises the circuits to generate and deliver the necessary high voltage to the x-decoder, flash array, and "pgm data hv" blocks. the logic control module comprises of the "write state machine, wsm", "state register", "command data decoder", and "command data latch". when the user issues a command by toggling we#, the command on q0-a15/a-1 is latched in the com- mand data latch and is decoded by the command data decoder. the state register receives the command and records the current state of the device. the wsm implements the internal algorithms for program or erase according to the current command state by controlling each block in the block diagram. array architecture the main flash memory array can be organized as 16m bytes x 8 or as 8m words x 16. the details of the address ranges and the corresponding sector addresses are shown in table 1. table 1.a shows the sector group architecture for the top boot part, whereas table 1.b shows the sector group architecture for the bottom boot part. the specific security sector addresses are shown at the bottom off each of these tables.
7 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 1. a: mx29lv128dt sector group architecture block structure sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 1 64 32 sa0 00000000xxx 000000-0ffff 000000-007fff 1 64 32 sa1 00000001xxx 010000-1ffff 008000-00ffff 1 64 32 sa2 00000010xxx 020000-2ffff 010000-017fff 1 64 32 sa3 00000011xxx 030000-3ffff 018000-01ffff 2 64 32 sa4 00000100xxx 040000-4ffff 020000-027fff 2 64 32 sa5 00000101xxx 050000-5ffff 028000-02ffff 2 64 32 sa6 00000110xxx 060000-6ffff 030000-037fff 2 64 32 sa7 00000111xxx 070000-7ffff 038000-03ffff 3 64 32 sa8 00001000xxx 080000-8ffff 040000-047fff 3 64 32 sa9 00001001xxx 090000-9ffff 048000-04ffff 3 64 32 sa10 00001010xxx 0a0000-affff 050000-057fff 3 64 32 sa11 00001011xxx 0b0000-bffff 058000-05ffff 4 64 32 sa12 00001100xxx 0c0000-cffff 060000-067fff 4 64 32 sa13 00001101xxx 0d0000-dffff 068000-06ffff 4 64 32 sa14 00001110xxx 0e0000-effff 070000-077fff 4 64 32 sa15 00001111xxx 0f0000-fffff 078000-07ffff 5 64 32 sa16 00010000xxx 100000-10ffff 080000-087fff 5 64 32 sa17 00010001xxx 110000-11ffff 088000-08ffff 5 64 32 sa18 00010010xxx 120000-12ffff 090000-097fff 5 64 32 sa19 00010011xxx 130000-13ffff 098000-09ffff 6 64 32 sa20 00010100xxx 140000-14ffff 0a0000-0a7fff 6 64 32 sa21 00010101xxx 150000-15ffff 0a8000-0affff 6 64 32 sa22 00010110xxx 160000-16ffff 0b0000-0b7fff 6 64 32 sa23 00010111xxx 170000-17ffff 0b8000-0bffff 7 64 32 sa24 00011000xxx 180000-18ffff 0c0000-0c7fff 7 64 32 sa25 00011001xxx 190000-19ffff 0c8000-0cffff 7 64 32 sa26 00011010xxx 1a0000-1affff 0d0000-0d7fff 7 64 32 sa27 00011011xxx 1b0000-1bffff 0d 8000-0dffff 8 64 32 sa28 00011100xxx 1c 0000-1cffff 0e0000-0e7fff 8 64 32 sa29 00011101xxx 1d 0000-1dffff 0e8000-0effff 8 64 32 sa30 00011110xxx 1e0000-1effff 0f0000-0f7fff 8 64 32 sa31 00011111xxx 1f 0000-1fffff 0f8000-0fffff 9 64 32 sa32 00100000xxx 200000-20ffff 100000-107fff 9 64 32 sa33 00100001xxx 210000-21ffff 108000-10ffff 9 64 32 sa34 00100010xxx 220000-22ffff 110000-117fff 9 64 32 sa35 00100011xxx 230000-23ffff 118000-11ffff 10 64 32 sa36 00100100xxx 240000-24ffff 120000-127fff 10 64 32 sa37 00100101xxx 250000-25ffff 128000-12ffff 10 64 32 sa38 00100110xxx 260000-26ffff 130000-137fff
8 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 10 64 32 sa39 00100111xxx 270000-27ffff 138000-13ffff 11 64 32 sa40 00101000xxx 280000-28ffff 140000-147fff 11 64 32 sa41 00101001xxx 290000-29ffff 148000-14ffff 11 64 32 sa42 00101010xxx 2a0000-2affff 150000-157fff 11 64 32 sa43 00101011xxx 2b0000-2bffff 158000-15ffff 12 64 32 sa44 00101100xxx 2c 0000-2cffff 160000-167fff 12 64 32 sa45 00101101xxx 2d 0000-2dffff 168000-16ffff 12 64 32 sa46 00101110xxx 2e0000-2effff 170000-177fff 12 64 32 sa47 00101111xxx 2f 0000-2fffff 178000-17ffff 13 64 32 sa48 00110000xxx 300000-30ffff 180000-187fff 13 64 32 sa49 00110001xxx 310000-31ffff 188000-18ffff 13 64 32 sa50 00110010xxx 320000-32ffff 190000-197fff 13 64 32 sa51 00110011xxx 330000-33ffff 198000-19ffff 14 64 32 sa52 00110100xxx 340000-34ffff 1a0000-1a7fff 14 64 32 sa53 00110101xxx 350000-35ffff 1a8000-1affff 14 64 32 sa54 00110110xxx 360000-36ffff 1b0000-1b7fff 14 64 32 sa55 00110111xxx 370000-37ffff 1b8000-1bffff 15 64 32 sa56 00111000xxx 380000-38ffff 1c0000-1c7fff 15 64 32 sa57 00111001xxx 390000-39ffff 1c8000-1cffff 15 64 32 sa58 00111010xxx 3a0000-3affff 1d0000-1d7fff 15 64 32 sa59 00111011xxx 3b0000-3bffff 1d 8000-1dffff 16 64 32 sa60 00111100xxx 3c 0000-3cffff 1e0000-1e7fff 16 64 32 sa61 00111101xxx 3d 0000-3dffff 1e8000-1effff 16 64 32 sa62 00111110xxx 3e0000-3effff 1f0000-1f7fff 16 64 32 sa63 00111111xxx 3f 0000-3fffff 1f8000-1fffff 17 64 32 sa64 01000000xxx 400000-40ffff 200000-207fff 17 64 32 sa65 01000001xxx 410000-41ffff 208000-20ffff 17 64 32 sa66 01000010xxx 420000-42ffff 210000-217fff 17 64 32 sa67 01000011xxx 430000-43ffff 218000-21ffff 18 64 32 sa68 01000100xxx 440000-44ffff 220000-227fff 18 64 32 sa69 01000101xxx 450000-45ffff 228000-22ffff 18 64 32 sa70 01000110xxx 460000-46ffff 230000-237fff 18 64 32 sa71 01000111xxx 470000-47ffff 238000-23ffff 19 64 32 sa72 01001000xxx 480000-48ffff 240000-247fff 19 64 32 sa73 01001001xxx 490000-49ffff 248000-24ffff 19 64 32 sa74 01001010xxx 4a0000-4affff 250000-257fff 19 64 32 sa75 01001011xxx 4b0000-4bffff 258000-25ffff 20 64 32 sa76 01001100xxx 4c 0000-4cffff 260000-267fff 20 64 32 sa77 01001101xxx 4d 0000-4dffff 268000-26ffff 20 64 32 sa78 01001110xxx 4e0000-4effff 270000-277fff 20 64 32 sa79 01001111xxx 4f 0000-4fffff 278000-27ffff
9 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 21 64 32 sa80 01010000xxx 500000-50ffff 280000-287fff 21 64 32 sa81 01010001xxx 510000-51ffff 288000-28ffff 21 64 32 sa82 01010010xxx 520000-52ffff 290000-297fff 21 64 32 sa83 01010011xxx 530000-53ffff 298000-29ffff 22 64 32 sa84 01010100xxx 540000-54ffff 2a0000-2a7fff 22 64 32 sa85 01010101xxx 550000-55ffff 2a8000-2affff 22 64 32 sa86 01010110xxx 560000-56ffff 2b0000-2b7fff 22 64 32 sa87 01010111xxx 570000-57ffff 2b8000-2bffff 23 64 32 sa88 01011000xxx 580000-58ffff 2c0000-2c7fff 23 64 32 sa89 01011001xxx 590000-59ffff 2c8000-2cffff 23 64 32 sa90 01011010xxx 5a0000-5affff 2d0000-2d7fff 23 64 32 sa91 01011011xxx 5b0000-5bffff 2d 8000-2dffff 24 64 32 sa92 01011100xxx 5c 0000-5cffff 2e0000-2e7fff 24 64 32 sa93 01011101xxx 5d 0000-5dffff 2e8000-2effff 24 64 32 sa94 01011110xxx 5e0000-5effff 2f0000-2f7fff 24 64 32 sa95 01011111xxx 5f 0000-5fffff 2f8000-2fffff 25 64 32 sa96 01100000xxx 600000-60ffff 300000-307fff 25 64 32 sa97 01100001xxx 610000-61ffff 308000-30ffff 25 64 32 sa98 01100010xxx 620000-62ffff 310000-317fff 25 64 32 sa99 01100011xxx 630000-63ffff 318000-31ffff 26 64 32 sa100 01100100xxx 640000-64ffff 320000-327fff 26 64 32 sa101 01100101xxx 650000-65ffff 328000-32ffff 26 64 32 sa102 01100110xxx 660000-66ffff 330000-337fff 26 64 32 sa103 01100111xxx 670000-67ffff 338000-33ffff 27 64 32 sa104 01101000xxx 680000-68ffff 340000-347fff 27 64 32 sa105 01101001xxx 690000-69ffff 348000-34ffff 27 64 32 sa106 01101010xxx 6a0000-6affff 350000-357fff 27 64 32 sa107 01101011xxx 6b0000-6bffff 358000-35ffff 28 64 32 sa108 01101100xxx 6c 0000-6cffff 360000-367fff 28 64 32 sa109 01101101xxx 6d 0000-6dffff 368000-36ffff 28 64 32 sa110 01101110xxx 6e0000-6effff 370000-377fff 28 64 32 sa111 01101111xxx 6f0000-6fffff 378000-37ffff 29 64 32 sa112 01110000xxx 700000-70ffff 380000-387fff 29 64 32 sa113 01110001xxx 710000-71ffff 388000-38ffff 29 64 32 sa114 01110010xxx 720000-72ffff 390000-397fff 29 64 32 sa115 01110011xxx 730000-73ffff 398000-39ffff 30 64 32 sa116 01110100xxx 740000-74ffff 3a0000-3a7fff 30 64 32 sa117 01110101xxx 750000-75ffff 3a8000-3affff 30 64 32 sa118 01110110xxx 760000-76ffff 3b0000-3b7fff 30 64 32 sa119 01110111xxx 770000-77ffff 3b8000-3bffff 31 64 32 sa120 01111000xxx 780000-78ffff 3c0000-3c7fff
10 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 31 64 32 sa121 01111001xxx 790000-79ffff 3c 8000-3cffff 31 64 32 sa122 01111010xxx 7a0000-7affff 3d0000-3d7fff 31 64 32 sa123 01111011xxx 7b0000-7bffff 3d 8000-3dffff 32 64 32 sa124 01111100xxx 7c 0000-7cffff 3e0000-3e7fff 32 64 32 sa125 01111101xxx 7d 0000-7dffff 3e8000-3effff 32 64 32 sa126 01111110xxx 7e0000-7effff 3f0000-3f7fff 32 64 32 sa127 01111111xxx 7f 0000-7fffff 3f8000-3fffff 33 64 32 sa128 10000000xxx 800000-80ffff 400000-407fff 33 64 32 sa129 10000001xxx 810000-81ffff 408000-40ffff 33 64 32 sa130 10000010xxx 820000-82ffff 410000-417fff 33 64 32 sa131 10000011xxx 830000-83ffff 418000-41ffff 34 64 32 sa132 10000100xxx 840000-84ffff 420000-427fff 34 64 32 sa133 10000101xxx 850000-85ffff 428000-42ffff 34 64 32 sa134 10000110xxx 860000-86ffff 430000-437fff 34 64 32 sa135 10000111xxx 870000-87ffff 438000-43ffff 35 64 32 sa136 10001000xxx 880000-88ffff 440000-447fff 35 64 32 sa137 10001001xxx 890000-89ffff 448000-44ffff 35 64 32 sa138 10001010xxx 8a0000-8affff 450000-457fff 35 64 32 sa139 10001011xxx 8b0000-8bffff 458000-45ffff 36 64 32 sa140 10001100xxx 8c 0000-8cffff 460000-467fff 36 64 32 sa141 10001101xxx 8d 0000-8dffff 468000-46ffff 36 64 32 sa142 10001110xxx 8e0000-8effff 470000-477fff 36 64 32 sa143 10001111xxx 8f0000-8fffff 478000-47ffff 37 64 32 sa144 10010000xxx 900000-90ffff 480000-487fff 37 64 32 sa145 10010001xxx 910000-91ffff 488000-48ffff 37 64 32 sa146 10010010xxx 920000-92ffff 490000-497fff 37 64 32 sa147 10010011xxx 930000-93ffff 498000-49ffff 38 64 32 sa148 10010100xxx 940000-94ffff 4a0000-4a7fff 38 64 32 sa149 10010101xxx 950000-95ffff 4a8000-4affff 38 64 32 sa150 10010110xxx 960000-96ffff 4b0000-4b7fff 38 64 32 sa151 10010111xxx 970000-97ffff 4b8000-4bffff 39 64 32 sa152 10011000xxx 980000-98ffff 4c0000-4c7fff 39 64 32 sa153 10011001xxx 990000-99ffff 4c 8000-4cffff 39 64 32 sa154 10011010xxx 9a0000-9affff 4d0000-4d7fff 39 64 32 sa155 10011011xxx 9b0000-9bffff 4d 8000-4dffff 40 64 32 sa156 10011100xxx 9c 0000-9cffff 4e0000-4e7fff 40 64 32 sa157 10011101xxx 9d 0000-9dffff 4e8000-4effff 40 64 32 sa158 10011110xxx 9e0000-9effff 4f0000-4f7fff 40 64 32 sa159 10011111xxx 9f 0000-9fffff 4f8000-4fffff 41 64 32 sa160 10100000xxx a00000-a0ffff 500000-507fff 41 64 32 sa161 10100001xxx a10000-a1ffff 508000-50ffff
11 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 41 64 32 sa162 10100010xxx a20000-a2ffff 510000-517fff 41 64 32 sa163 10100011xxx a30000-a3ffff 518000-51ffff 42 64 32 sa164 10100100xxx a40000-a4ffff 520000-527fff 42 64 32 sa165 10100101xxx a50000-a5ffff 528000-52ffff 42 64 32 sa166 10100110xxx a60000-a6ffff 530000-537fff 42 64 32 sa167 10100111xxx a70000-a7ffff 538000-53ffff 43 64 32 sa168 10101000xxx a80000-a8ffff 540000-547fff 43 64 32 sa169 10101001xxx a90000-a9ffff 548000-54ffff 43 64 32 sa170 10101010xxx aa0000-aaffff 550000-557fff 43 64 32 sa171 10101011xxx ab0000-abffff 558000-55ffff 44 64 32 sa172 10101100xxx ac0000-acffff 560000-567fff 44 64 32 sa173 10101101xxx ad0000-adf fff 568000-56ffff 44 64 32 sa174 10101110xxx ae0000-aeffff 570000-577fff 44 64 32 sa175 10101111xxx af0000-a fffff 578000-57ffff 45 64 32 sa176 10110000xxx b00000-b0ffff 580000-587fff 45 64 32 sa177 10110001xxx b10000-b1ffff 588000-58ffff 45 64 32 sa178 10110010xxx b20000-b2ffff 590000-597fff 45 64 32 sa179 10110011xxx b30000-b3ffff 598000-59ffff 46 64 32 sa180 10110100xxx b40000-b4ffff 5a0000-5a7fff 46 64 32 sa181 10110101xxx b50000-b5ffff 5a8000-5affff 46 64 32 sa182 10110110xxx b60000-b6ffff 5b0000-5b7fff 46 64 32 sa183 10110111xxx b70000-b7ffff 5b8000-5bffff 47 64 32 sa184 10111000xxx b80000-b8ffff 5c0000-5c7fff 47 64 32 sa185 10111001xxx b90000-b9ffff 5c 8000-5cffff 47 64 32 sa186 10111010xxx ba0000-baffff 5d0000-5d7fff 47 64 32 sa187 10111011xxx bb0000-bbffff 5d 8000-5dffff 48 64 32 sa188 10111100xxx bc0000-bcffff 5e0000-5e7fff 48 64 32 sa189 10111101xxx bd0000-bdffff 5e8000-5effff 48 64 32 sa190 10111110xxx be0000-beffff 5f0000-5f7fff 48 64 32 sa191 10111111xxx b f0000-bfffff 5f 8000-5fffff 49 64 32 sa192 11000000xxx c 00000-c0ffff 600000-607fff 49 64 32 sa193 11000001xxx c 10000-c1ffff 608000-60ffff 49 64 32 sa194 11000010xxx c 20000-c2ffff 610000-617fff 49 64 32 sa195 11000011xxx c 30000-c3ffff 618000-61ffff 50 64 32 sa196 11000100xxx c 40000-c4ffff 620000-627fff 50 64 32 sa197 11000101xxx c 50000-c5ffff 628000-62ffff 50 64 32 sa198 11000110xxx c 60000-c6ffff 630000-637fff 50 64 32 sa199 11000111xxx c 70000-c7ffff 638000-63ffff 51 64 32 sa200 11001000xxx c 80000-c8ffff 640000-647fff 51 64 32 sa201 11001001xxx c 90000-c9ffff 648000-64ffff 51 64 32 sa202 11001010xxx ca0000-caffff 650000-657fff
12 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 51 64 32 sa203 11001011xxx cb0000-cbf fff 658000-65ffff 52 64 32 sa204 11001100xxx cc0000-ccffff 660000-667fff 52 64 32 sa205 11001101xxx cd0000-cdffff 668000-66ffff 52 64 32 sa206 11001110xxx ce0000-ceffff 670000-677fff 52 64 32 sa207 11001111xxx cf0000-cfffff 678000-67ffff 53 64 32 sa208 11010000xxx d 00000-d0ffff 680000-687fff 53 64 32 sa209 11010001xxx d 10000-d1ffff 688000-68ffff 53 64 32 sa210 11010010xxx d 20000-d2ffff 690000-697fff 53 64 32 sa211 11010011xxx d 30000-d3ffff 698000-69ffff 54 64 32 sa212 11010100xxx d 40000-d4 ffff 6a0000-6a7fff 54 64 32 sa213 11010101xxx d 50000-d5 ffff 6a8000-6affff 54 64 32 sa214 11010110xxx d 60000-d6 ffff 6b0000-6b7fff 54 64 32 sa215 11010111xxx d 70000-d7 ffff 6b8000-6bffff 55 64 32 sa216 11011000xxx d 80000-d8ffff 6c0000-6c7fff 55 64 32 sa217 11011001xxx d 90000-d9ffff 6c8000-6cffff 55 64 32 sa218 11011010xxx d a0000-d affff 6d0000-6d7fff 55 64 32 sa219 11011011xxx db0000-dbffff 6d 8000-6dffff 56 64 32 sa220 11011100xxx dc0000-dcffff 6e0000-6e7fff 56 64 32 sa221 11011101xxx dd0000-ddffff 6e8000-6effff 56 64 32 sa222 11011110xxx d e0000-deffff 6f0000-6f7fff 56 64 32 sa223 11011111xxx df0000-dfffff 6f8000-6fffff 57 64 32 sa224 11100000xxx e00000-e0ffff 700000-707fff 57 64 32 sa225 11100001xxx e10000-e1ffff 708000-70ffff 57 64 32 sa226 11100010xxx e20000-e2ffff 710000-717fff 57 64 32 sa227 11100011xxx e30000-e3ffff 718000-71ffff 58 64 32 sa228 11100100xxx e40000-e4ffff 720000-727fff 58 64 32 sa229 11100101xxx e50000-e5ffff 728000-72ffff 58 64 32 sa230 11100110xxx e60000-e6ffff 730000-737fff 58 64 32 sa231 11100111xxx e70000-e7ffff 738000-73ffff 59 64 32 sa232 11101000xxx e80000-e8ffff 740000-747fff 59 64 32 sa233 11101001xxx e90000-e9ffff 748000-74ffff 59 64 32 sa234 11101010xxx ea0000-eaffff 750000-757fff 59 64 32 sa235 11101011xxx eb0000-ebffff 758000-75ffff 60 64 32 sa236 11101100xxx ec0000-ecffff 760000-767fff 60 64 32 sa237 11101101xxx ed0000-edf fff 768000-76ffff 60 64 32 sa238 11101110xxx ee0000-eeffff 770000-777fff 60 64 32 sa239 11101111xxx ef0000-e fffff 778000-77ffff 61 64 32 sa240 11110000xxx f00000-ffffff 780000-787fff
13 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 61 64 32 sa241 11110001xxx f10000-f1ffff 788000-78ffff 61 64 32 sa242 11110010xxx f20000-f2ffff 790000-797fff 61 64 32 sa243 11110011xxx f30000-f3ffff 798000-79ffff 62 64 32 sa244 11110100xxx f40000-f4ffff 7a0000-7a7fff 62 64 32 sa245 11110101xxx f50000-f5 ffff 7a8000-7affff 62 64 32 sa246 11110110xxx f60000-f6ffff 7b0000-7b7fff 62 64 32 sa247 11110111xxx f70000-f7 ffff 7b8000-7bffff 63 64 32 sa248 11111000xxx f80000-f8ffff 7c0000-7c7fff 63 64 32 sa249 11111001xxx f90000-f9ffff 7c 8000-7cffff 63 64 32 sa250 11111010xxx fa0000-faffff 7d0000-7d7fff 63 64 32 sa251 11111011xxx fb0000-fbffff 7d 8000-7dffff 64 64 32 sa252 11111100xxx fc0000-fcffff 7e0000-7e7fff 64 64 32 sa253 11111101xxx fd0000-fdffff 7e8000-7effff 64 64 32 sa254 11111110xxx fe0000-feffff 7f0000-7f7fff 65 8 4 sa255 11111111000 ff0000-ff1fff 7f8000- 7f8fff 66 8 4 sa256 11111111001 ff2000-ff3fff 7f9000- 7f9fff 67 8 4 sa257 11111111010 ff4000-ff5fff 7f a000-7fafff 68 8 4 sa258 11111111011 ff6000-ff7fff 7fb000-7fbfff 69 8 4 sa259 11111111100 ff8000-ff9fff 7fc000-7fcfff 70 8 4 sa260 11111111101 ff a000-ffbfff 7fd000-7fdfff 71 8 4 sa261 11111111110 ffc000-ffdfff 7fe000-7fefff 72 8 4 sa262 11111111111 ffe000-ffffff 7ff000-7fffff top boot security sector addresses sector size s ector address a ddress range byte mode word mode a21~a12 byte mode (x8) word mode (x16) (bytes) (words) 256 128 1111111111 ffff00h-ffffffh 7fff80h- 7fffffh
14 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 1 8 4 sa0 00000000000 000000-001fff 000000-000fff 2 8 4 sa1 00000000001 002000-003fff 001000-001fff 3 8 4 sa2 00000000010 004000-005fff 002000-002fff 4 8 4 sa3 00000000011 006000-007fff 003000-003fff 5 8 4 sa4 00000000100 008000-009fff 004000-004fff 6 8 4 sa5 00000000101 00a000-00bfff 005000-005fff 7 8 4 sa6 00000000110 00c000-00dfff 006000-006fff 8 8 4 sa7 00000000111 00e000-00ffff 007000-007fff 9 64 32 sa8 00000001xxx 010000-01ffff 008000-00ffff 9 64 32 sa9 00000010xxx 020000-02ffff 010000-017fff 9 64 32 sa10 00000011xxx 030000-03ffff 018000-01ffff 10 64 32 sa11 00000100xxx 040000-04ffff 020000-027fff 10 64 32 sa12 00000101xxx 050000-05ffff 028000-02ffff 10 64 32 sa13 00000110xxx 060000-06ffff 030000-037fff 10 64 32 sa14 00000111xxx 070000-07ffff 038000-03ffff 11 64 32 sa15 00001000xxx 080000-08ffff 040000-047fff 11 64 32 sa16 00001001xxx 090000-09ffff 048000-04ffff 11 64 32 sa17 00001010xxx 0a0000-0affff 050000-057fff 11 64 32 sa18 00001011xxx 0b0000-0bffff 058000-05ffff 12 64 32 sa19 00001100xxx 0c 0000-0cffff 060000-067fff 12 64 32 sa20 00001101xxx 0d 0000-0dffff 068000-06ffff 12 64 32 sa21 00001110xxx 0e0000-0effff 070000-077fff 12 64 32 sa22 00001111xxx 0f 0000-0fffff 078000-07ffff 13 64 32 sa23 00010000xxx 100000-10ffff 080000-087fff 13 64 32 sa24 00010001xxx 110000-11ffff 088000-08ffff 13 64 32 sa25 00010010xxx 120000-12ffff 090000-097fff 13 64 32 sa26 00010011xxx 130000-13ffff 098000-09ffff 14 64 32 sa27 00010100xxx 140000-14ffff 0a0000-0a7fff 14 64 32 sa28 00010101xxx 150000-15ffff 0a8000-0affff 14 64 32 sa29 00010110xxx 160000-16ffff 0b0000-0b7fff 14 64 32 sa30 00010111xxx 170000-17ffff 0b8000-0bffff 15 64 32 sa31 00011000xxx 180000-18ffff 0c0000-0c7fff 15 64 32 sa32 00011001xxx 190000-19ffff 0c8000-0cffff 15 64 32 sa33 00011010xxx 1a0000-1affff 0d0000-0d7fff 15 64 32 sa34 00011011xxx 1b0000-1bffff 0d 8000-0dffff 16 64 32 sa35 00011100xxx 1c 0000-1cffff 0e0000-0e7fff 16 64 32 sa36 00011101xxx 1d 0000-1dffff 0e8000-0effff 16 64 32 sa37 00011110xxx 1e0000-1effff 0f0000-0f7fff 16 64 32 sa38 00011111xxx 1f 0000-1fffff 0f8000-0fffff table 1. b: MX29LV128DB sector group architecture
15 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 17 64 32 sa39 00100000xxx 200000-20ffff 100000-107fff 17 64 32 sa40 00100001xxx 210000-21ffff 108000-10ffff 17 64 32 sa41 00100010xxx 220000-22ffff 110000-117fff 17 64 32 sa42 00100011xxx 230000-23ffff 118000-11ffff 18 64 32 sa43 00100100xxx 240000-24ffff 120000-127fff 18 64 32 sa44 00100101xxx 250000-25ffff 128000-12ffff 18 64 32 sa45 00100110xxx 260000-26ffff 130000-137fff 18 64 32 sa46 00100111xxx 270000-27ffff 138000-13ffff 19 64 32 sa47 00101000xxx 280000-28ffff 140000-147fff 19 64 32 sa48 00101001xxx 290000-29ffff 148000-14ffff 19 64 32 sa49 00101010xxx 2a0000-2affff 150000-157fff 19 64 32 sa50 00101011xxx 2b0000-2bffff 158000-15ffff 20 64 32 sa51 00101100xxx 2c 0000-2cffff 160000-167fff 20 64 32 sa52 00101101xxx 2d 0000-2dffff 168000-16ffff 20 64 32 sa53 00101110xxx 2e0000-2effff 170000-177fff 20 64 32 sa54 00101111xxx 2f 0000-2fffff 178000-17ffff 21 64 32 sa55 00110000xxx 300000-30ffff 180000-187fff 21 64 32 sa56 00110001xxx 310000-31ffff 188000-18ffff 21 64 32 sa57 00110010xxx 320000-32ffff 190000-197fff 21 64 32 sa58 00110011xxx 330000-33ffff 198000-19ffff 22 64 32 sa59 00110100xxx 340000-34ffff 1a0000-1a7fff 22 64 32 sa60 00110101xxx 350000-35ffff 1a8000-1affff 22 64 32 sa61 00110110xxx 360000-36ffff 1b0000-1b7fff 22 64 32 sa62 00110111xxx 370000-37ffff 1b8000-1bffff 23 64 32 sa63 00111000xxx 380000-38ffff 1c0000-1c7fff 23 64 32 sa64 00111001xxx 390000-39ffff 1c8000-1cffff 23 64 32 sa65 00111010xxx 3a0000-3affff 1d0000-1d7fff 23 64 32 sa66 00111011xxx 3b0000-3bffff 1d 8000-1dffff 24 64 32 sa67 00111100xxx 3c 0000-3cffff 1e0000-1e7fff 24 64 32 sa68 00111101xxx 3d 0000-3dffff 1e8000-1effff 24 64 32 sa69 00111110xxx 3e0000-3effff 1f0000-1f7fff 24 64 32 sa70 00111111xxx 3f 0000-3fffff 1f8000-1fffff 25 64 32 sa71 01000000xxx 400000-40ffff 200000-207fff 25 64 32 sa72 01000001xxx 410000-41ffff 208000-20ffff 25 64 32 sa73 01000010xxx 420000-42ffff 210000-217fff 25 64 32 sa74 01000011xxx 430000-43ffff 218000-21ffff 26 64 32 sa75 01000100xxx 440000-44ffff 220000-227fff 26 64 32 sa76 01000101xxx 450000-45ffff 228000-22ffff 26 64 32 sa77 01000110xxx 460000-46ffff 230000-237fff 26 64 32 sa78 01000111xxx 470000-47ffff 238000-23ffff 27 64 32 sa79 01001000xxx 480000-48ffff 240000-247fff
16 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 27 64 32 sa80 01001001xxx 490000-49ffff 248000-24ffff 27 64 32 sa81 01001010xxx 4a0000-4affff 250000-257fff 27 64 32 sa82 01001011xxx 4b0000-4bffff 258000-25ffff 28 64 32 sa83 01001100xxx 4c 0000-4cffff 260000-267fff 28 64 32 sa84 01001101xxx 4d 0000-4dffff 268000-26ffff 28 64 32 sa85 01001110xxx 4e0000-4effff 270000-277fff 28 64 32 sa86 01001111xxx 4f 0000-4fffff 278000-27ffff 29 64 32 sa87 01010000xxx 500000-50ffff 280000-287fff 29 64 32 sa88 01010001xxx 510000-51ffff 288000-28ffff 29 64 32 sa89 01010010xxx 520000-52ffff 290000-297fff 29 64 32 sa90 01010011xxx 530000-53ffff 298000-29ffff 30 64 32 sa91 01010100xxx 540000-54ffff 2a0000-2a7fff 30 64 32 sa92 01010101xxx 550000-55ffff 2a8000-2affff 30 64 32 sa93 01010110xxx 560000-56ffff 2b0000-2b7fff 30 64 32 sa94 01010111xxx 570000-57ffff 2b8000-2bffff 31 64 32 sa95 01011000xxx 580000-58ffff 2c0000-2c7fff 31 64 32 sa96 01011001xxx 590000-59ffff 2c8000-2cffff 31 64 32 sa97 01011010xxx 5a0000-5affff 2d0000-2d7fff 31 64 32 sa98 01011011xxx 5b0000-5bffff 2d 8000-2dffff 32 64 32 sa99 01011100xxx 5c 0000-5cffff 2e0000-2e7fff 32 64 32 sa100 01011101xxx 5d 0000-5dffff 2e8000-2effff 32 64 32 sa101 01011110xxx 5e0000-5effff 2f0000-2f7fff 32 64 32 sa102 01011111xxx 5f 0000-5fffff 2f8000-2fffff 33 64 32 sa103 01100000xxx 600000-60ffff 300000-307fff 33 64 32 sa104 01100001xxx 610000-61ffff 308000-30ffff 33 64 32 sa105 01100010xxx 620000-62ffff 310000-317fff 33 64 32 sa106 01100011xxx 630000-63ffff 318000-31ffff 34 64 32 sa107 01100100xxx 640000-64ffff 320000-327fff 34 64 32 sa108 01100101xxx 650000-65ffff 328000-32ffff 34 64 32 sa109 01100110xxx 660000-66ffff 330000-337fff 34 64 32 sa110 01100111xxx 670000-67ffff 338000-33ffff 35 64 32 sa111 01101000xxx 680000-68ffff 340000-347fff 35 64 32 sa112 01101001xxx 690000-69ffff 348000-34ffff 35 64 32 sa113 01101010xxx 6a0000-6affff 350000-357fff 35 64 32 sa114 01101011xxx 6b0000-6bffff 358000-35ffff 36 64 32 sa115 01101100xxx 6c 0000-6cffff 360000-367fff 36 64 32 sa116 01101101xxx 6d 0000-6dffff 368000-36ffff 36 64 32 sa117 01101110xxx 6e0000-6effff 370000-377fff 36 64 32 sa118 01101111xxx 6f0000-6fffff 378000-37ffff 37 64 32 sa119 01110000xxx 700000-70ffff 380000-387fff 37 64 32 sa120 01110001xxx 710000-71ffff 388000-38ffff
17 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 37 64 32 sa121 01110010xxx 720000-72ffff 390000-397fff 37 64 32 sa122 01110011xxx 730000-73ffff 398000-39ffff 38 64 32 sa123 01110100xxx 740000-74ffff 3a0000-3a7fff 38 64 32 sa124 01110101xxx 750000-75ffff 3a8000-3affff 38 64 32 sa125 01110110xxx 760000-76ffff 3b0000-3b7fff 38 64 32 sa126 01110111xxx 770000-77ffff 3b8000-3bffff 39 64 32 sa127 01111000xxx 780000-78ffff 3c0000-3c7fff 39 64 32 sa128 01111001xxx 790000-79ffff 3c 8000-3cffff 39 64 32 sa129 01111010xxx 7a0000-7affff 3d0000-3d7fff 39 64 32 sa130 01111011xxx 7b0000-7bffff 3d 8000-3dffff 40 64 32 sa131 01111100xxx 7c 0000-7cffff 3e0000-3e7fff 40 64 32 sa132 01111101xxx 7d 0000-7dffff 3e8000-3effff 40 64 32 sa133 01111110xxx 7e0000-7effff 3f0000-3f7fff 40 64 32 sa134 01111111xxx 7f 0000-7fffff 3f8000-3fffff 41 64 32 sa135 10000000xxx 800000-80ffff 400000-407fff 41 64 32 sa136 10000001xxx 810000-81ffff 408000-40ffff 41 64 32 sa137 10000010xxx 820000-82ffff 410000-417fff 41 64 32 sa138 10000011xxx 830000-83ffff 418000-41ffff 42 64 32 sa139 10000100xxx 840000-84ffff 420000-427fff 42 64 32 sa140 10000101xxx 850000-85ffff 428000-42ffff 42 64 32 sa141 10000110xxx 860000-86ffff 430000-437fff 42 64 32 sa142 10000111xxx 870000-87ffff 438000-43ffff 43 64 32 sa143 10001000xxx 880000-88ffff 440000-447fff 43 64 32 sa144 10001001xxx 890000-89ffff 448000-44ffff 43 64 32 sa145 10001010xxx 8a0000-8affff 450000-457fff 43 64 32 sa146 10001011xxx 8b0000-8bffff 458000-45ffff 44 64 32 sa147 10001100xxx 8c 0000-8cffff 460000-467fff 44 64 32 sa148 10001101xxx 8d 0000-8dffff 468000-46ffff 44 64 32 sa149 10001110xxx 8e0000-8effff 470000-477fff 44 64 32 sa150 10001111xxx 8f0000-8fffff 478000-47ffff 45 64 32 sa151 10010000xxx 900000-90ffff 480000-487fff 45 64 32 sa152 10010001xxx 910000-91ffff 488000-48ffff 45 64 32 sa153 10010010xxx 920000-92ffff 490000-497fff 45 64 32 sa154 10010011xxx 930000-93ffff 498000-49ffff 46 64 32 sa155 10010100xxx 940000-94ffff 4a0000-4a7fff 46 64 32 sa156 10010101xxx 950000-95ffff 4a8000-4affff 46 64 32 sa157 10010110xxx 960000-96ffff 4b0000-4b7fff 46 64 32 sa158 10010111xxx 970000-97ffff 4b8000-4bffff 47 64 32 sa159 10011000xxx 980000-98ffff 4c0000-4c7fff 47 64 32 sa160 10011001xxx 990000-99ffff 4c 8000-4cffff 47 64 32 sa161 10011010xxx 9a0000-9affff 4d0000-4d7fff 47 64 32 sa162 10011011xxx 9b0000-9bffff 4d 8000-4dffff
18 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 48 64 32 sa163 10011100xxx 9c 0000-9cffff 4e0000-4e7fff 48 64 32 sa164 10011101xxx 9d 0000-9dffff 4e8000-4effff 48 64 32 sa165 10011110xxx 9e0000-9effff 4f0000-4f7fff 48 64 32 sa166 10011111xxx 9f 0000-9fffff 4f8000-4fffff 49 64 32 sa167 10100000xxx a00000-a0ffff 500000-507fff 49 64 32 sa168 10100001xxx a10000-a1ffff 508000-50ffff 49 64 32 sa169 10100010xxx a20000-a2ffff 510000-517fff 49 64 32 sa170 10100011xxx a30000-a3ffff 518000-51ffff 50 64 32 sa171 10100100xxx a40000-a4ffff 520000-527fff 50 64 32 sa172 10100101xxx a50000-a5ffff 528000-52ffff 50 64 32 sa173 10100110xxx a60000-a6ffff 530000-537fff 50 64 32 sa174 10100111xxx a70000-a7ffff 538000-53ffff 51 64 32 sa175 10101000xxx a80000-a8ffff 540000-547fff 51 64 32 sa176 10101001xxx a90000-a9ffff 548000-54ffff 51 64 32 sa177 10101010xxx aa0000-aaffff 550000-557fff 51 64 32 sa178 10101011xxx ab0000-abffff 558000-55ffff 52 64 32 sa179 10101100xxx ac0000-acffff 560000-567fff 52 64 32 sa180 10101101xxx ad0000-adf fff 568000-56ffff 52 64 32 sa181 10101110xxx ae0000-aeffff 570000-577fff 52 64 32 sa182 10101111xxx af0000-a fffff 578000-57ffff 53 64 32 sa183 10110000xxx b00000-b0ffff 580000-587fff 53 64 32 sa184 10110001xxx b10000-b1ffff 588000-58ffff 53 64 32 sa185 10110010xxx b20000-b2ffff 590000-597fff 53 64 32 sa186 10110011xxx b30000-b3ffff 598000-59ffff 54 64 32 sa187 10110100xxx b40000-b4ffff 5a0000-5a7fff 54 64 32 sa188 10110101xxx b50000-b5ffff 5a8000-5affff 54 64 32 sa189 10110110xxx b60000-b6ffff 5b0000-5b7fff 54 64 32 sa190 10110111xxx b70000-b7ffff 5b8000-5bffff 55 64 32 sa191 10111000xxx b80000-b8ffff 5c0000-5c7fff 55 64 32 sa192 10111001xxx b90000-b9ffff 5c 8000-5cffff 55 64 32 sa193 10111010xxx ba0000-baffff 5d0000-5d7fff 55 64 32 sa194 10111011xxx bb0000-bbffff 5d 8000-5dffff 56 64 32 sa195 10111100xxx bc0000-bcffff 5e0000-5e7fff 56 64 32 sa196 10111101xxx bd0000-bdffff 5e8000-5effff 56 64 32 sa197 10111110xxx be0000-beffff 5f0000-5f7fff 56 64 32 sa198 10111111xxx b f0000-bfffff 5f 8000-5fffff 57 64 32 sa199 11000000xxx c 00000-c0ffff 600000-607fff 57 64 32 sa200 11000001xxx c 10000-c1ffff 608000-60ffff 57 64 32 sa201 11000010xxx c 20000-c2ffff 610000-617fff 57 64 32 sa202 11000011xxx c 30000-c3ffff 618000-61ffff
19 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 58 64 32 sa203 11000100xxx c 40000-c4ffff 620000-627fff 58 64 32 sa204 11000101xxx c 50000-c5ffff 628000-62ffff 58 64 32 sa205 11000110xxx c 60000-c6ffff 630000-637fff 58 64 32 sa206 11000111xxx c 70000-c7ffff 638000-63ffff 59 64 32 sa207 11001000xxx c 80000-c8ffff 640000-647fff 59 64 32 sa208 11001001xxx c 90000-c9ffff 648000-64ffff 59 64 32 sa209 11001010xxx ca0000-caffff 650000-657fff 59 64 32 sa210 11001011xxx cb0000-cbf fff 658000-65ffff 60 64 32 sa211 11001100xxx cc0000-ccffff 660000-667fff 60 64 32 sa212 11001101xxx cd0000-cdffff 668000-66ffff 60 64 32 sa213 11001110xxx ce0000-ceffff 670000-677fff 60 64 32 sa214 11001111xxx cf0000-cfffff 678000-67ffff 61 64 32 sa215 11010000xxx d 00000-d0ffff 680000-687fff 61 64 32 sa216 11010001xxx d 10000-d1ffff 688000-68ffff 61 64 32 sa217 11010010xxx d 20000-d2ffff 690000-697fff 61 64 32 sa218 11010011xxx d 30000-d3ffff 698000-69ffff 62 64 32 sa219 11010100xxx d 40000-d4 ffff 6a0000-6a7fff 62 64 32 sa220 11010101xxx d 50000-d5 ffff 6a8000-6affff 62 64 32 sa221 11010110xxx d 60000-d6 ffff 6b0000-6b7fff 62 64 32 sa222 11010111xxx d 70000-d7 ffff 6b8000-6bffff 63 64 32 sa223 11011000xxx d 80000-d8ffff 6c0000-6c7fff 63 64 32 sa224 11011001xxx d 90000-d9ffff 6c8000-6cffff 63 64 32 sa225 11011010xxx d a0000-d affff 6d0000-6d7fff 63 64 32 sa226 11011011xxx db0000-dbffff 6d 8000-6dffff 64 64 32 sa227 11011100xxx dc0000-dcffff 6e0000-6e7fff 64 64 32 sa228 11011101xxx dd0000-ddffff 6e8000-6effff 64 64 32 sa229 11011110xxx d e0000-deffff 6f0000-6f7fff 64 64 32 sa230 11011111xxx df0000-dfffff 6f8000-6fffff 65 64 32 sa231 11100000xxx e00000-e0ffff 700000-707fff 65 64 32 sa232 11100001xxx e10000-e1ffff 708000-70ffff 65 64 32 sa233 11100010xxx e20000-e2ffff 710000-717fff 65 64 32 sa234 11100011xxx e30000-e3ffff 718000-71ffff 66 64 32 sa235 11100100xxx e40000-e4ffff 720000-727fff 66 64 32 sa236 11100101xxx e50000-e5ffff 728000-72ffff 66 64 32 sa237 11100110xxx e60000-e6ffff 730000-737fff 66 64 32 sa238 11100111xxx e70000-e7ffff 738000-73ffff 67 64 32 sa239 11101000xxx e80000-e8ffff 740000-747fff 67 64 32 sa240 11101001xxx e90000-e9ffff 748000-74ffff 67 64 32 sa241 11101010xxx ea0000-eaffff 750000-757fff 67 64 32 sa242 11101011xxx eb0000-ebffff 758000-75ffff
20 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector sector size sector s ector address address range group byte mode word mode a22-a12 byte mode (x8) word mode (x16) (kbytes) (kwords) 68 64 32 sa243 11101100xxx ec0000-ecffff 760000-767fff 68 64 32 sa244 11101101xxx ed0000-edf fff 768000-76ffff 68 64 32 sa245 11101110xxx ee0000-eeffff 770000-777fff 68 64 32 sa246 11101111xxx ef0000-e fffff 778000-77ffff 69 64 32 sa247 11110000xxx f00000-f0ffff 780000-787fff 69 64 32 sa248 11110001xxx f10000-f1ffff 788000-78ffff 69 64 32 sa249 11110010xxx f20000-f2ffff 790000-797fff 69 64 32 sa250 11110011xxx f30000-f3ffff 798000-79ffff 70 64 32 sa251 11110100xxx f40000-f4ffff 7a0000-7a7fff 70 64 32 sa252 11110101xxx f50000-f5 ffff 7a8000-7affff 70 64 32 sa253 11110110xxx f60000-f6ffff 7b0000-7b7fff 70 64 32 sa254 11110111xxx f70000-f7 ffff 7b8000-7bffff 71 64 32 sa255 11111000xxx f80000-f8ffff 7c0000-7c7fff 71 64 32 sa256 11111001xxx f90000-f9ffff 7c 8000-7cffff 71 64 32 sa257 11111010xxx fa0000-faffff 7d0000-7d7fff 71 64 32 sa258 11111011xxx fb0000-fbffff 7d 8000-7dffff 72 64 32 sa259 11111100xxx fc0000-fcffff 7e0000-7e7fff 72 64 32 sa260 11111101xxx fd0000-fdffff 7e8000-7effff 72 64 32 sa261 11111110xxx fe0000-feffff 7f0000-7f7fff 72 64 32 sa262 11111111xxx ff0000-ffffff 7f8000- 7fffff bottom boot security sector addresses sector size s ector address a ddress range byte mode word mode a21~a12 byte mode (x8) word mode (x16) (bytes) (words) 256 128 0000000000 000000h-0000ffh 000000h-00007fh
21 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b functional operation description read operation to perform a read operation, the system addresses the desired memory array or status register location by providing its address on the address pins and simultaneously enabling the chip by driving ce# & oe# low, and we# high. after the tce and toe timing requirements have been met, the system can read the contents of the addressed location by reading the data (i/o) pins. if either the ce# or oe# is held high, the outputs will remain tri-stated and no data will appear on the output pins. write operation to perform a write operation, the system provides the desired address on the address pins, enables the chip by asserting ce# low, and disables the data (i/o) pins by holding oe# high. the system then places data to be written on the data (i/o) pins and pulses we# low. the device captures the address information on the falling edge of we# and the data on the rising edge of we#. to see an example, please refer to the timing diagram in figure 1 on page 42. the system is not allowed to write invalid commands (commands not defined in this datasheet) to the device. writing an invalid command may put the device in an undefined state. device reset driving the reset# pin low for a period of trp or more will return the device to read mode. if the device is in the middle of a program or erase operation, the reset operation will take at most a period of tready1 before the device returns to read mode. until the device does returns to read mode, the ry/by# pin will remain low (busy status). when the reset# pin is held at gnd 0.3v, the device only consumes standby (isbr) current. however, the device draws larger current if the reset# pin is held at a voltage greater than gnd+0.3v and less than or equal to vil. it is recommended to tie the system reset signal to the reset# pin of the flash memory. this allows the device to be reset with the system and puts it in a state where the system can immediately begin reading boot code from it. standby mode the device enters standby mode whenever the reset# and ce# pins are both held high. while in this mode, we# and oe# will be ignored, all data output pins will be in a high impedance state, and the device will draw minimal (isb) current. output disable while in active mode (reset# high and ce# low), the oe# pin controls the state of the output pins. if oe# is held high, all data (i/o) pins will remain tri-stated. if held low, the byte or word data (i/o) pins will drive data. byte/word selection the byte# input pin is used to select the organization of the array data and how the data is input/output on the data (i/o) pins. if the byte# pin is held high, word mode will be selected and all 16 data lines (q0 to q15) will be active.
22 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b functional operation description (cont'd) if byte# is forced low, byte mode will be active and only data lines q0 to q7 will be active. data lines q8 to q14 will remain in a high impedance state and q15 becomes the a-1 address input pin. hardware write protect by driving the wp#/acc pin low, the outermost two boot sectors are protected from all erase/program operations. if wp#/acc is held high (vih to vcc), these two outermost sectors revert to their previously protected/unprotected status. accelerated programming operation by applying high voltage (vhv) to the wp#/acc pin, the device will enter the accelerated programming mode. this mode permits the system to skip the normal command unlock sequences and program byte/word locations directly. typically, this mode provides a 30% reduction in overall programming times. during accelerated programming, the current drawn from the wp#/acc pin is no more than icp1. temporary sector group unprotect operation the system can apply vhv to the reset# pin to place the device in temporary unprotect mode. in this mode, previously protected sectors can be programmed/erased just as though they were unprotected. the device returns to normal operation once vhv is removed from the reset# pin and previously protected sectors will once again be protected. sector group protect operation the mx29lv128d t/b provides user programmable protection against program/erase operations for selected sectors. most sectors cannot protected individually. instead, they are bound in groups of four or less called sector-groups. protection is available for individual sector-groups, which includes all member sectors. boot sectors are the excep- tion to this rule as they are assigned unique sector-group addresses and can be protected individually without protect- ing any adjacent sectors or sector-groups. the three sectors adjacent to the boot sectors form a non-standard sector- group. please refer to table 1a and table 1b which show all sector-group assignments. during the protection operation, the sector address of any sector within a sector-group may be used to specify the sector-group being protected. there are two methods available to protect sector-groups. the first and preferred method is activated by applying vhv on the reset# pin and following the timing in figure 13 and the algorithm shown in figure 14-1. this is a command operation that can be performed either on an external programmer or in-circuit by the system controller. the second method is strictly a bus operation and is entered by asserting vhv on a9 and oe# pins, with a6 and ce# at vil. the protection operation begins at the falling edge of we# and terminates at the rising edge. contact macronix for more details on this method.
23 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b functional operation description (cont'd) chip unprotect operation the chip unprotect operation unprotects all sectors within the device. it is standard procedure and highly recom- mended to protect all sector-groups prior using the chip unprotect operation. this will prevent possible damage to the sector-group protection logic. all sector groups are unprotected when shipped from the factory, so this operation is only necessary if the user has previously protected any sector-groups and wishes to unprotect them now. mx29lv128d t/b provides two methods for unprotecting the entire chip. the first and preferred method is entered by applying vhv on reset# pin and following the timing diagram in figure 13 and using the algorithm shown in figure 14- 2. the second method is entered by asserting vhv on a9 and oe# pins, with a6 at vih and ce# at vil. the protection operation begins at the falling edge of we# and terminates at the rising edge. contact macronix for more details on this method. automatic select bus operations the following five bus operations require a9 to be raised to vhv. please see automatic select command sequence in the command operations section for details of equivalent command operations that do not require the use of vhv. sector lock status verification to determine the protected state of any sector using bus operations, the system performs a read operation with a9 raised to vhv, the sector address applied to address pins a22 to a12, address pins a6 & a0 held low, and address pin a1 held high. if data bit q0 is low, the sector is not protected, and if q0 is high, the sector is protected. read silicon id manufacturer code to determine the silicon id manufacturer code, the system performs a read operation with a9 raised to vhv and address pins a6, a1, & a0 held low. the macronix id code of c2h should be present on data bits q0 to q7. read silicon id mx29lv128dt code to verify the silicon id mx29lv128dt code, the system performs a read operation with a9 raised to vhv, address pins a6 & a1 held low, and address pin a0 held high. the mx29lv128dt code of 7eh should be present on data bits q0 to q7. q15 to q8 will be tri-stated unless word mode is selected. in this case, q15 to q8 will output the value 22h. read silicon id MX29LV128DB code to verify the silicon id MX29LV128DB code, the system performs a read operation with a9 raised to vhv, address pins a6 & a1 held low, and address pin a0 held high. the mx29lv128dt code of 7ah should be present on data bits q0 to q7. q15 to q8 will be tri-stated unless word mode is selected. in this case, q15 to q8 will output the code 22h.
24 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b functional operation description (cont'd) read indicator bit (q7) for security sector to determine if the security sector has been locked at the factory, the system performs a read operation with a9 raised to vhv, address pin a6 held low, and address pins a1 & a0 held high. if the security sector has been locked at the factory, the code 98h(t)/88h(b) will be present on data bits q0 to q7. otherwise, the factory unlocked code of 18h(t)/08h(b) will be present. inherent data protection to avoid accidental erasure or programming of the device, the device is automatically reset to read mode during power up. additionally, the following design features protect the device from unintended data corruption. command completion only after the successful completion of the specified command sets will the device begin its erase or program operation. if any command sequence is interrupted or given an invalid command, the device immediately returns to read mode. low vcc write inhibit the device refuses to accept any write command when vcc is less than vlko. this prevents data from spuriously being altered during power-up, power-down, or temporary power interruptions. the device automatically resets itself when vcc is lower than vlko and write cycles are ignored until vcc is greater than vlko. the system must provide proper signals on control pins after vcc rises above vlko to avoid unintentional program or erase operations. write pulse "glitch" protection ce#, we#, oe# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write cycle. logical inhibit a valid write cycle requires both ce# and we# at vil with oe# at vih. write cycle is ignored when either ce# at vih, we# a vih, or oe# at vil. power-up sequence upon power up, the mx29lv128d t/b is placed in read mode. furthermore, program or erase operation will begin only after successful completion of specified command sequences.
25 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b functional operation description (cont'd) power-up write inhibit when we#, ce# is held at vil and oe# is held at vih during power up, the device ignores the first command on the rising edge of we#. power supply decoupling a 0.1uf capacitor should be connected between the vcc and gnd to reduce the noise effect.
26 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 3. mx29lv128d t/b command definitions wa= write address wd= write data sa= sector address wc= word count note: id 227eh(top), 227ah(bottom) for word mode id 7eh(top), 7ah(bottom) for byte mode word byte word byte word byte word byte word byte word byte 1st bus addr addr xxx 555 aaa 555 aaa 555 aaa 555 aaa 555 aaa 555 aaa cycle data data f0 aa aa aa aa aa aa aa aa aa aa aa aa 2nd bus addr 2aa 555 2aa 555 2aa 555 2aa 555 2aa 555 2aa 555 cycle data 55 55 55 55 55 55 55 55 55 55 55 55 3rd bus addr 555 aaa 555 aaa 555 aaa 555 aaa 555 aaa 555 aaa cycle data 90 90 90 90 90 90 90 90 88 88 90 90 4th bus addr x00 x00 x01 x02 x03 x06 (sector) x02 (sector) x04 xxx xxx cycle data c2h c2h id id 98/18(t) 00/01 00/01 00 00 88/08(b) 5th bus addr cycle data 6th bus addr cycle data automatic select security sector region exit security sector silicon id device id factory protect verify sector protect verify reset mode read mode command word byte word byte word byte word byte 1st bus addr 555 aaa 555 aaa 555 aaa 55 aa sector sector cycle data aa aa aa aa aa aa 98 98 b0 30 2nd bus addr 2aa 555 2aa 555 2aa 555 cycle data 55 55 55 55 55 55 3rd bus addr 555 aaa 555 aaa 555 aaa cycle data a0 a0 80 80 80 80 4th bus addr addr addr 555 aaa 555 aaa cycle data data data aa aa aa aa 5th bus addr 2aa 555 2aa 555 cycle data 55 55 55 55 6th bus addr 555 aaa sector sector cycle data 10 10 30 30 sector erase cfi read erase suspend erase resume command program chip erase
27 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations reading the memory array read mode is the default state after power up or after a reset operation. to perform a read operation, please refer to read operation in the bus operations section above. if the device receives an erase suspend command while in the sector erase state, the erase operation will pause (after a time delay not exceeding tready1) and the device will enter erase-suspended read mode. while in the erase- suspended read mode, data can be programmed or read from any sector not being erased. reading from addresses within sector(s) being erased will only return the contents of the status register, which is in fact how the current status of the device can be determined. if a program command is issued to any inactive (not currently being erased) sector during erase-suspended read mode, the device will perform the program operation and automatically return to erase-suspended read mode after the program operation completes successfully. while in erase-suspended read mode, an erase resume command must be issued by the system to reactivate the erase operation. the erase operation will resume from where is was suspended and will continue until it completes successfully or another erase suspend command is received. after the memory device completes an embedded operation (automatic chip erase, sector erase, or program) suc- cessfully, it will automatically return to read mode and data can be read from any address in the array. if the embed- ded operation fails to complete, as indicated by status register bit q5 (exceeds time limit flag) going high during the operations, the system must perform a reset operation to return the device to read mode. there are several states that require a reset operation to return to read mode: 1. a program or erase failure--indicated by status register bit q5 going high during the operation. failures during either of these states will prevent the device from automatically returning to read mode. 2. the device is in auto select mode or cfi mode. these two states remain active until they are terminated by a reset operation. in the two situations above, if a reset operation (either hardware reset or software reset command) is not performed, the device will not return to read mode and the system will not be able to read array data. automatic programming of the memory array the mx29lv128d t/b provides the user the ability to program the memory array in byte mode or word mode. as long as the users enters the correct cycle defined in the table 3 (including 2 unlock cycles and the a0h program command), any byte or word data provided on the data lines by the system will automatically be programmed into the array at the specified location. after the program command sequence has been executed, the internal write state machine (wsm) automatically executes the algorithms and timings necessary for programming and verification, which includes generating suitable program pulses, checking cell threshold voltage margins, and repeating the program pulse if any cells do not pass verification or have low margins. the internal controller protects cells that do pass verification and margin tests from being over-programmed by inhibiting further program pulses to these passing cells as weaker cells continue to be programmed. with the internal wsm automatically controlling the programming process, the user only needs to enter the program command and data once.
28 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations (cont'd) automatic programming of the memory array (cont'd) programming will only change the bit status from "1" to "0". it is not possible to change the bit status from "0" to "1" by programming. this can only be done by an erase operation. furthermore, the internal write verification only checks and detects errors in cases where a "1" is not successfully programmed to "0". any commands written to the device during programming will be ignored except hardware reset, which will terminate the program operation after a period of time no more than tready1. when the embedded program algorithm is complete or the program operation is terminated by a hardware reset, the device will return to read mode. after the embedded program operation has begun, the user can check for completion by reading the following bits in the status register: status q7 *1 q6 *1 q5 ry/by# *2 in progress q7# toggling 0 0 finished q7 stop toggling 0 1 exceed time limit q7# to ggling 1 0 *1: when an attempt is made to program a protected sector, the program operation will abort thus preventing any data changes in the protected sector. q7 will output complement data and q6 will toggle briefly (1us or less) before aborting and returning the device to read mode. *2: ry/by# is an open drain output pin and should be connected to vcc through a high value pull-up resistor. erasing the memory array there are two types of erase operations performed on the memo ry array -- sector erase and chip erase. in the sector erase operation, one or more selected sectors may be erased simultaneously. in the chip erase operation, the complete memory array is erased except for any protected sectors. more details of the protected sectors are explained in section 5. sector erase the sector erase operation is used to clear data within a sector by returning all of its memory locations to the "1" state. it requires six command cycles to initiate the erase operation. the first two cycles are "unlock cycles", the third is a configuration cycle, the fourth and fifth are also "unlock cycles", and the sixth cycle is the sector erase command. after the sector erase command sequence has been issued, an internal 50us time-out counter is started. until this counter reaches zero, additional sector addresses and sector erase commands may be issued thus allowing multiple sectors to be selected and erased simultaneously. after the 50us time-out counter has expired, no new commands will be accepted and the embedded sector erase operation will begin. note that the 50us timer-out counter is restarted after every erase command sequence. if the user enters any command other than sector erase or erase suspend during the time-out period, the erase operation will abort and the device will return to read mode. after the embedded sector erase operation begins, all commands except erase suspend will be ignored. the only way to interrupt the operation is with an erase suspend command or with a hardware reset. the hardware reset will completely abort the operation and return the device to read mode.
29 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations (cont'd) sector erase (cont'd) the system can determine the status of the embedded sector erase operation by the following methods: status q7 q6 q5 q3 *1 q2 ry/by# *2 time-out period 0 to ggling 0 0 toggling 0 in progress 0 toggling 0 1 toggling 0 finished 1 stop toggling 0 1 1 1 exceeded time limit 0 to ggling 1 1 toggling 0 chip erase the chip erase operation is used erase all the data within the memory array. all memory cells containing a "0" will be returned to the erased state of "1". this operation requires 6 write cycles to initiate the action. the first two cycles are "unlock" cycles, the third is a configuration cycle, the fourth and fifth are also "unlock" cycles, and the sixth cycle initiates the chip erase operation. during the chip erase operation, no other software commands will be accepted, but if a hardware reset is received or the working voltage is too low, that chip erase will be terminated. after chip erase, the chip will automatically return to read mode. the system can determine the status of the embedded chip erase operation by the following methods: status q7 q6 q5 q2 ry/by# *1 in progress 0 toggling 0 toggling 0 finished 1 stop toggling 0 1 1 exceed time limit 0 to ggling 1 toggling 0 *1: ry/by# is open drain output pin and should be connected to vcc through a high value pull-up resistor. note: 1. the q3 status bit is the 50us time-out indicator. when q3=0, the 50us time-out counter has not yet reached zero and a new sector erase command may be issued to specify the address of another sector to be erased. when q3=1, the 50us time-out counter has expired and the sector erase operation has already begun. erase suspend is the only valid command that may be issued once the embedded erase operation is underway. 2. ry/by# is open drain output pin and should be connected to vcc through a high value pull-up resistor. 3. when an attempt is made to erase only protected sector(s), the program operation will abort thus preventing any data changes in the protected sector(s). q7 will output its complement data and q6 will toggle briefly (100us or less) before aborting and returning the device to read mode. if unprotected sectors are also specified, however, they will be erased normally and the protected sector(s) will remain unchanged. 4. q2 is a localized indicator showing a specified sector is undergoing erase operation or not. q2 toggles when user reads at addresses where the sectors are actively being erased (in erase mode) or to be erased (in erase suspend mode). when a sector has been completely erased, q2 stops toggling at the sector even when the device is still in erase operation for remaining selected sectors. at that circumstance, q2 will still toggle when device is read at any other sector that remains to be erased.
30 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b after beginning a sector erase operation, erase suspend is the only valid command that may be issued. if system issues an erase suspend command during the 50us time-out period following a sector erase command, the time-out period will terminate immediately and the device will enter erase-suspended read mode. if the system issues an erase suspend command after the sector erase operation has already begun, the device will not enter erase-sus- pended read mode until tready1 time has elapsed. the system can determine if the device has entered the erase- suspended read mode through q6, q7, and ry/by#. after the device has entered erase-suspended read mode, the system can read or program any sector(s) except those being erased by the suspended erase operation. reading any sector being erased or programmed will return the contents of the status register. whenever a suspend command is issued, user must issue a resume command and check q6 toggle bit status, before issue another erase command. the system can use the status register bits shown in the following table to determine the current state of the device: status q7 q6 q5 q3 q2 ry/by# erase suspend read in erase suspended sector 1 no to ggle 0 n/a to ggle 1 erase suspend read in non-erase suspended sector data data data data data 1 erase suspend program in non-erase suspended sector q7# to ggle 0 n/a n/a 0 command operations (cont'd) erase suspend/resume when the device has suspended erasing, user can execute the command sets except sector erase and chip erase, such as read silicon id, sector protect verify, program, cfi query and erase resume. sector erase resume the sector erase resume command is valid only when the device is in erase-suspended read mode. after erase resumes, the user can issue another ease suspend command, but there should be a 400us interval between ease resume and the next erase suspend command. if the user enters an infinite suspend-resume loop, or suspend- resume exceeds 1024 times, erase times will increase dramatically. automatic select operations when the device is in read mode, erase-suspended read mode, or cfi mode, the user can issue the automatic select command shown in table 3 (two unlock cycles followed by the automatic select command 90h) to enter automatic select mode. after entering automatic select mode, the user can query the manufacturer id, device id, security sector locked status, or sector-group protected status multiple times without issuing a new automatic select command. while in automatic select mode, issuing a reset command (f0h) will return the device to read mode (or ease- suspended read mode if erase-suspend was active). another way to enter automatic select mode is to use one of the bus operations shown in table 2. bus opera- tion_2. after the high voltage (vhv) is removed from the a9 pin, the device will automatically return to read mode or erase-suspended read mode.
31 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 2-1. bus operation notes: 1. all sectors will be unprotected if wp#/acc=vhv. 2. the two outmost boot sectors are protected if wp#/acc=vil. 3. when wp#/acc = vih, the protection conditions of the two outmost boot sectors depend on previous protection conditions."sector/sector block protection and unprotection" describes the protect and unprotect method. 4. q0~q15 are input (din) or output (dout) pins according to the requests of command sequence, sector protection, or data polling algorithm. 5. in word mode (byte#=vih), the addresses are am to a0. in byte mode (byte#=vil), the addresses are am to a-1 (q15). 6. am: msb of address. mode select re- ce# we# oe# address data byte# wp#/ set# (i/o) vil vih acc q0~q7 data (i/o) q8~q15 device reset l x x x x h ighz highz highz l/h standby mode vcc vcc x x x highz highz highz h 0.3v 0.3v output h l h h x h ighz highz highz l/h disable read mode h l h l ain dout q8- q14= dout l/h write(note1) h l l h ain din highz, din note3 accelerate h l l h ain din q15=a1 din vhv program temporary vhv x x x ain din highz din note3 sector-group unprotect sector-group vhv l l h s ector address, din, dout x x l/h protect (n ote2) a6=l,a1=h,a0=l chip unprotect vhv l l h s ector address, din, dout x x note3 (note2) a6=h,a1=h,a0=l
32 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b item control input am a11 a8 a5 ce# we# oe# to to a9 to a6 to a1 a0 q0~q7 q8~q15 a12 a10 a7 a2 sector lock status l h l sa x v hv x l x h l 01h or x verification 00h (note1) read silicon id l h l x x v hv x l x l l c2h x manufacturer code read silicon id l h l x x v hv x l x l h 7eh 22h(word) mx29lv128dt xxh(byte) read silicon id l h l x x v hv x l x l h 7ah 22h(word) MX29LV128DB xxh(byte) read indicator bit l h l x x v hv x l x h h (note2) x (q7) for security sector notes: 1. sector unprotected code:00h. sector protected code:01h. 2. factory locked code: wp# protects bottom two address sector: 88h. wp# protects top two address sector: 98h factory unlocked code: wp# protects bottom two address sector: 08h. wp# protects top two address sector: 18h 3. am: msb of address. table 2-2. bus operation
33 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations (cont'd) automatic select command sequence automatic select mode is used to access the manufacturer id, device id and to verify whether or not secured silicon is locked and whether or not a sector is protected. the automatic select mode has four command cycles. the first two are unlock cycles, and followed by a specific command. the fourth cycle is a normal read cycle, and user can read at any address any number of times without entering another command sequence. the reset command is necessary to exit the automatic select mode and back to read array. the following table shows the identification code with corre- sponding address. address data (hex) representation manufacturer id word x00 c2 byte x00 c2 device id word x01 227e/227a top/bottom boot sector byte x02 7e/7a top/bottom boot sector secured silicon word x03 98/18 (top) f actory locked/unlocked 88/08 (bottom) byte x06 98/18 (top) f actory locked/unlocked 88/08 (bottom) sector protect verify word (sector address) x 02 00/01 unpro tected/protected byte (sector address) x 04 00/01 unpro tected/protected after entering automatic select mode, no other commands are allowed except the reset command. read manufacturer id or device id the manufacturer id (identification) is a unique hexadecimal number assigned to each manufacturer by the jedec committee. each company has its own manufacturer id, which is different from the id of all other companies. the number assigned to macronix is c2h. the device id is a unique hexadecimal number assigned by the manufacturer for each one of the flash devices made by that manufacturer. the above two id types are stored in a 16-bit register on the flash device -- eight bits for each id. this register is normally read by the user or by the programming machine to identify the manufacturer and the specific device. after entering automatic select mode, performing a read operation with a1 & a0 held low will cause the device to output the manufacturer id on the data i/o (q7 to q0) pins. performing a read operation with a1 low and a0 high will cause the device to output the device id. security sector lock status after entering automatic select mode, the customer can check the lock status of the security sector by performing a read operations with a0 and a1 held high. if the code 98h(t)/88h(b) is read from data pins q7 to q0, the sector has been locked at the factory. if the code 18h(t)/08h(b) is read, the sector has not been locked at the factory.
34 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations (cont'd) verify sector group protection after entering automatic select mode, performing a read operation with a1 held high and a0 held low and the address of the sector to be checked applied to a20 to a12, data bit q0 will indicate the protected status of the addressed sector. if q0 is high, the sector is protected. conversely, if q0 is low, the sector is unprotected. security sector flash memory region the security sector region is an extra memory space of 128-words in length. the security sector can be locked by the factory prior to shipping, or it can be locked by the customer later. factory locked: security sector programmed and protected at the factory in a factory locked device, the security sector is permanently locked before shipping from the factory. the device will have a 16-byte (8-word) esn in the security region. in bottom boot devices, the esn occupies addresses 00000h to 0000fh in byte mode or 00000h to 00007h in word mode. in top boot devices, the esn occupies addresses ffff00h to ffff0fh in byte mode or 7fff80h to 7fff87h in word mode. customer lockable: security sector not programmed or protected at the factory when the security feature is not required, the security sector can provide an extra sector of memory. two methods are available for protecting the security sector. note that once the security sector is protected, there is no way to unprotect it and its contents can no longer be altered. the first protection method requires writing the three-cycle enter security region command followed by the use of the sector-group protect algorithm as illustrated in figure 14-1 with the following exception: the reset# pin may be at either vih or vhv. unlike normal sector-groups, which do require vhv on the reset# pin, the security sector may be permanently locked in-circuit without the use of high voltage. the second protection method also uses the three-cycle enter security region command, but uses bus operations that applies vhv to the a9 and oe# pins with a6, ce#, and we# held low and the sa address applied to a20 to a12. the protection operation begins at the falling edge of we# and terminates at the rising edge. contact macronix for more details on using this method. after the security sector is locked and verified, the system must write an exit security sector region command, go through a power cycle, or issue a hardware reset to return the device to read normal array mode. enter and exit security sector the device allows the user to access the extra 128-words sector identified as the security sector, which may contain a random, 128-bits electronic serial number (esn), or it may contain user data. to access the security sector, the user must issue a three-cycle "enter security sector" command sequence. to exit the security sector and return to normal operation, the user issues the four-cycle "exit security sector" command.
35 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b command operations (cont'd) reset in the following situations, executing reset command will reset device back to read mode: ? among erase command sequence (before the full command set is completed) ? sector erase time-out period ? erase fail (while q5 is high) ? among program command sequence (before the full command set is completed, erase-suspended program in- cluded) ? program fail (while q5 is high, and erase-suspended program fail is included) ? read silicon id mode ? sector protect verify ? cfi mode while device is at the status of program fail or erase fail (q5 is high), user must issue reset command to reset device back to read array mode. while the device is in read silicon id mode, sector protect verify or cfi mode, user must issue reset command to reset device back to read array mode. when the device is in the progress of programming (not program fail) or erasing (not erase fail), device will ignore reset command.
36 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 4-1. cfi mode: identification data values (all values in these tables are in hexadecimal) table 4-2. cfi mode: system interface data values common flash memory interface (cfi) mode query command and command flash memory interface (cfi) mode mx29lv128d t/b features cfi mode. host system can retrieve the operating characteristics, structure and vendor- specified information such as identifying information, memory size, byte/word configuration, operating voltages and timing information of this device by cfi mode. if the system writes the cfi query command "98h", to address "55h"/ "aah" (depending on word/byte mode), the device will enter the cfi query mode, any time the device is ready to read array data. the system can read cfi information at the addresses given in table 4. once user enters cfi query mode, user can not issue any other commands except reset command. the reset command is required to exit cfi mode and go back to the mode before entering cfi. the system can write the cfi query command only when the device is in read mode, erase suspend, standby mode or automatic select mode. description address (h) address (h) data (h) (word mode) (byte mode) query-unique ascii string "qry" 10 20 0051 11 22 0052 12 24 0059 primary vendor command set and control interface id code 13 26 0002 14 28 0000 address for primary algorithm extended query table 15 2a 0040 16 2c 0000 alternate vendor command set and control interface id code 17 2e 0000 18 30 0000 address for alternate algorithm extended query table 19 32 0000 1a 34 0000 description address (h) address (h) data (h) (word mode) (byte mode) vcc supply minimum program/erase voltage 1b 36 0030 vcc supply maximum program/erase voltage 1c 38 0036 vpp supply minimum program/erase voltage 1d 3a 0000 vpp supply maximum program/erase voltage 1e 3c 0000 typical timeout per single word/byte write, 2 n us 1f 3e 0004 typical timeout for maximum-size buffer write, 2 n us 20 40 0000 typical timeout per individual block erase, 2 n ms 21 42 000a typical timeout for full chip erase, 2 n ms 22 44 0000 maximum timeout for word/byte write, 2 n times typical 23 46 0005 maximum timeout for buffer write, 2 n times typical 24 48 0000 maximum timeout per individual block erase, 2 n times typical 25 4a 0004 maximum timeout for chip erase, 2 n times typical 26 4c 0000
37 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 4-3. cfi mode: device geometry data values description address (h) address (h) data (h) (word mode) (byte mode) device size = 2 n in number of bytes 27 4e 0018 flash device interface description (02=asynchronous x8/x16) 28 50 0002 29 52 0000 maximum number of bytes in buffer write = 2 n (not support) 2a 54 0000 2b 56 0000 number of erase regions within device 2c 58 0002 index for erase bank area 1 2d 5a 0007 [2e,2d] = # of same-size sectors in region 1-1 2e 5c 0000 [30, 2f] = sector size in multiples of 256-bytes 2f 5e 0020 30 60 0000 index for erase bank area 2 31 62 00fe 32 64 0000 33 66 0000 34 68 0001 index for erase bank area 3 35 6a 0000 36 6c 0000 37 6e 0000 38 70 0000 index for erase bank area 4 39 72 0000 3a 74 0000 3b 76 0000 3c 78 0000
38 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b table 4-4. cfi mode: primary vendor-specific extended query data values description address (h) address (h) data (h) (word mode) (byte mode) query - primary extended table, unique ascii string, pri 40 80 0050 41 82 0052 42 84 0049 major version number, ascii 43 86 0031 minor version number, ascii 44 88 0033 unlock recognizes address (0= recognize, 1= don't recognize) 45 8a 0000 erase suspend (2= to both read and program) 46 8c 0002 sector protect (n= # of sectors/group) 47 8e 0004 temporary sector unprotect (1=supported) 48 90 0001 sector protect/chip unprotect scheme 49 92 0004 simultaneous r/w operation (0=not supported) 4a 94 0000 burst mode (0=not supported) 4b 96 0000 page mode (0=not supported) 4c 98 0000 minimum acc(acceleration) supply (0= not supported), [d7:d4] for volt, 4d 9a 00a5 [d3:d0] for 100mv maximum acc(acceleration) supply (0= not supported), [d7:d4] for volt, 4e 9c 00b5 [d3:d0] for 100mv top/bottom boot block indicator 4f 9e 0002/ 02h=bottom boot device 03h=top boot device 0003
39 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b absolute maximum stress ratings surrounding temperature with bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 o c to +125 o c storage temperature . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 o c to +150 o c voltage range vcc . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 v to +4.0 v reset#, a9 and oe# . .. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 v to +10.5 v the other pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 v to vcc +0.5 v output short circuit current (less than one second) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 ma operating temperature and voltage commercial (c) grade surrounding temperature (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 c to +70 c industrial (i) grade surrounding temperature (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 c to +85 c v cc supply voltages v cc range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.0 v to 3.6 v electrical characteristics note: 1. minimum voltage may undershoot to -2v during transition and for less than 20ns during transitions. 2. maximum voltage may overshoot to vcc+2v during transition and for less than 20ns during transitions.
40 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b dc characteristics symbol description min typ max remark iilk input leak 1.0ua iilk9 a9 leak 35ua a9 =10.5v iolk output leak 1.0ua icr1 read current 5ma 15ma ce#=v il, oe#=vih, vcc=vccmax; f=1mhz, byte mode 20ma 40ma ce#=vil, oe#=vih, vcc=vccmax; f=5mhz, word mode 35ma 70ma ce#=vil, oe#=vih, vcc=vccmax; f=10mhz icw write current 26ma 30ma ce#=v il, oe#=vih, we#=vil isb standby current 8ua 20ua vcc=vcc max, other pin disable isbr reset current 8ua 20ua vcc=vccmax, reset# enable, other pin disable isbs sleep mode current 8ua 20ua icp1 accelerated pgm current, 5ma 10ma ce#=vil, wp#/acc pin(wo rd/byte) oe#=vih icp2 accelerated pgm current, 15ma 30ma ce#=vil, vcc pin,(wo rd/byte) oe#=vih vil input low voltage -0.5v 0.8v vih input high voltage 0.7xvcc vcc+0.3v vhv very high voltage for hardware 9.5v 10.5v protect/unprotect/auto select/ temporary unprotect/ accelerated program vol output lo w voltage 0.45v io l=4.0ma voh1 ouput high voltage 0. 85xvcc io h1=-2ma voh2 ouput high vo ltage vcc-0.4v io h2=-100ua vlko low vcc lock-out voltage 2.3v 2.5v
41 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b switching test circuits test condition output load : 1 ttl gate output load capacitance,cl : 30pf rise/fall times : 5ns in/out reference levels :1.5v switching test waveforms 1.5v 1.5v test points 3.0v 0.0v output input r1=6.2k ohm r2=2.7k ohm tested device diodes=in3064 or equivalent cl r1 vcc 0.1uf r2 +3.3v
42 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b ac characteristics symbol description min typ max unit taa valid data output after address 90 ns tce valid data output after ce# low 90 ns toe valid data output after oe# low 30 ns tdf data output floating after oe# high 30 ns toh output hold time from the earliest rising edge of address, 0 ns ce#, oe# trc read period time 90 ns twc write period time 90 ns tcwc command write period time 90 ns tas address setup time 0 ns tah address hold time 45 ns tds data setup time 45 ns tdh data hold time 0 ns tvcs vcc setup time 50 us tcs chip enable setup time 0 ns tch chip enable hold time 0 ns toes output enable setup time 0 ns toeh read 0 ns toeh output enable hold time to ggle & 10 ns data# polling tws we# setup time 0 ns twh we# hold time 0 ns tcep ce# pulse width 45 ns tceph ce# pulse width high 30 ns twp we# pulse width 35 ns twph we# pulse width high 30 ns tbusy program/erase activ e time by ry/by# 90 ns tghwl read recover time before write 0 ns tghel read recover time before write 0 ns twhwh1 program oper ation byte 9 us twhwh1 program oper ation word 11 us twhwh1 acc program operation(word/byte) 9 210 us twhwh2 s ector erase operation 1 5 sec tbal sector add hold time 50 us
43 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 1. command write operation addresses ce# oe# we# din tds ta h data tdh tcs tch tcwc twph tw p toes ta s vih vil vih vil vih vil vih vil vih vil va va: valid address
44 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b read/reset operation figure 2. read timing waveforms addresses ce# oe# ta a we# vih vil vih vil vih vil vih vil voh vol high z high z data valid to e toeh tdf tce tr c outputs to h add valid
45 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 3. reset# timing waveform ac characteristics item description setup speed unit trp1 reset# pulse width (during automatic algorithms) min 10 us trp2 reset# pulse width (not during automatic algorithms) min 500 ns trh reset# high time before read min 50 ns trb1 ry/by# recovery time (to ce#, oe# go low) min 0 ns trb2 ry/by# recovery time (to we# go low) min 50 ns tready1 reset# pin low (during automatic algorithms) max 20 us to read or write tready2 reset# pin low (not during automatic max 500 ns algorithms) to read or write tr h trb1 tr p 2 tr p 1 tready2 tready1 ry/by# ce#, oe# reset# reset timing not during automatic algorithms reset timing during automatic algorithms ry/by# ce#, oe# trb2 we# reset#
46 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b erase/program operation figure 4. automatic chip erase timing waveform tw c address oe# ce# 55h 2aah 555h 10h in progress complete va va ta s ta h tghwl tch tw p tds tdh twhwh2 read status last 2 erase command cycle tbusy tr b tcs twph we# data ry/by#
47 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 5. automatic chip erase algorithm flowchart start write data aah address 555h write data 55h address 2aah write data aah address 555h write data 80h address 555h yes no data=ffh ? write data 10h address 555h write data 55h address 2aah data# polling algorithm or toggle bit algorithm auto chip erase completed
48 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 6. automatic sector erase timing waveform tw c address oe# ce# 55h 2aah sector address 1 sector address 0 30h in progress complete va va 30h sector address n ta s ta h tbal tghwl tch tw p tds tdh twhwh2 read status last 2 erase command cycle tbusy tr b tcs twph we# data ry/by# 30h
49 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 7. automatic sector erase algorithm flowchart start write data aah address 555h write data 55h address 2aah write data aah address 555h write data 80h address 555h write data 30h sector address write data 55h address 2aah data# polling algorithm or toggle bit algorithm auto sector erase completed no last sector to erase yes yes no data=ffh
50 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 8. erase suspend/resume flowchart start write data b0h toggle bit checking q6 not toggled erase suspend yes no write data 30h continue erase reading or programming end read array or program another erase suspend ? no yes yes no erase resume
51 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 9. automatic program timing waveforms address oe# ce# a0h 555h pa pd status dout va va ta s ta h tghwl tch tw p tds tdh twhwh1 last 2 read status cycle last 2 program command cycle tbusy tr b tcs twph we# data ry/by# figure 10. accelerated program timing diagram wp#/acc 250ns 250ns vhv (9.5v ~ 10.5v) vil or vih vil or vih
52 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 11. ce# controlled write timing waveform address oe# ce# a0h 555h pa pd status dout va va ta s ta h tghwl tcep tds tdh twhwh1 or twhwh2 tbusy tceph we# data ry/by#
53 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 12. automatic programming algorithm flowchart start write data aah address 555h write data 55h address 2aah write program data/address write data a0h address 555h yes read again data: program data? yes auto program completed data# polling algorithm or toggle bit algorithm next address last word to be programed no no
54 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b sector group protect/chip unprotect figure 13. sector group protect/chip unprotect waveform (reset# control) 150us: sector protect 15ms: chip unprotect 1us vhv vih data sa, a6 a1, a0 ce# we# oe# va va va status va: valid address 40h 60h 60h verification reset#
55 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 14-1. in-system sector group protect with reset#=vhv start retry count=0 reset#=vhv wait 1us write sector address with [a6,a1,a0]:[0,1,0] data: 60h write sector address with [a6,a1,a0]:[0,1,0] data: 40h read at sector address with [a6,a1,a0]:[0,1,0] wait 150us reset plscnt=1 temporary unprotect mode reset#=vih write reset cmd sector protect done device fail temporary unprotect mode retry count +1 first cmd=60h? data=01h? retry count=25? ye s ye s ye s ye s no no no no protect another sector?
56 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 14-2. chip unprotect algorithms with reset#=vhv write [a6,a1,a0]:[1,1,0] data: 60h write [a6,a1,a0]:[1,1,0] data: 40h read [a6,a1,a0]:[1,1,0] wait 15ms temporary unprotect write reset cmd chip unprotect done retry count +1 device fail all sectors protected? data=00h? retry count=1000? ye s ye s no no ye s protect all sectors start retry count=0 reset#=vhv wait 1us temporary unprotect first cmd=60h? ye s no no
57 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 15. temporary sector group unprotect waveforms table 5. temporary sector group unprotect parameter alt description condition speed unit trpvhh tvidr reset# rise time to vhv and vhv fall time to reset# min 500 ns tvhhwl trsp reset# vhv to we# low min 4 us reset# ce# we# ry/by# trpvhh 10v vhv 0 or vih vil or vih tvhhwl trpvhh program or erase command sequence
58 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 16. temporary sector group unprotect flowchart start apply reset# pin vhv volt enter program or erase mode (1) remove vhv volt from reset# (2) reset# = vih completed temporary sector unprotected mode mode operation completed notes: 1. temporary unprotect all protected sectors vhv=9.5~10.5v. 2. after leaving temporary unprotect mode, the previously protected sectors are again protected.
59 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 17. silicon id read timing waveform ta a tce ta a to e to h to h tdf data out c2h 7eh (top boot) 7ah (bottom boot) vhv vih vil a9 add ce# a1 oe# we# a0 data out data q0-q7 (byte mode) vih vil vih vil vih vil vih vil vih vil vih vil vih vil data out 00c2h 227eh (top boot) 227ah (bottom boot) data out data q0-q15/a-1 (word mode) vih vil
60 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b write operation status figure 18. data# polling timing waveforms (during automatic algorithms) tdf tce tch to e toeh to h ce# oe# we# q7 q0-q6 ry/by# tbusy status data status data status data complement true valid data ta a tr c address va va high z high z valid data tr u e
61 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 19. data# polling algorithm read q7~q0 at valid address (note 1) read q7~q0 at valid address start q7 = data# ? q5 = 1 ? q7 = data# ? (note 2) fail pass no no no ye s ye s ye s notes: 1. for programming, valid address means program address. for erasing, valid address means erase sectors address. 2. q7 should be rechecked even q5="1" because q7 may change simultaneously with q5.
62 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 20. toggle bit timing waveforms (during automatic algorithms) tdf tce tch to e toeh ta a tr c to h address ce# oe# we# q6/q2 ry/by# tbusy valid status (first read) valid status (second read) (stops toggling) valid data va va va va : valid address va valid data
63 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 21. toggle bit algorithm notes: 1. read toggle bit twice to determine whether or not it is toggling. 2. recheck toggle bit because it may stop toggling as q5 changes to "1". read q7-q0 twice q5 = 1? read q7~q0 twice pgm/ers fail write reset cmd pgm/ers complete q6 toggle ? q6 toggle ? no (note 1) yes no no yes yes start
64 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b figure 22. byte# timing waveform for read operations (byte# switching from byte mode to word mode) ac characteristics word/byte configuration (byte#) parameter description speed unit 90 telfl/telfh ce# to byte# from l/h max 5 ns tflqz byte# from l to output hiz max 30 ns tfhqv byte# fro m h to output active min 90 ns tfhqv telfh dout (q0-q7) dout (q0-q14) va dout (q15) ce# oe# byte# q0~q14 q15/a-1
65 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b recommended operating conditions at device power-up ac timing illustrated in figure a is recommended for the supply voltages and the control signals at device power-up. if the timing in the figure is ignored, the device may not operate correctly. figure a. ac timing at device power-up symbol parameter min. max. unit tvr vcc rise time 20 500000 us/v tr input signal rise ti me 20 us/v tf input signal fall time 20 us/v tvcs vcc setup time 200 us vcc address ce# we# oe# data tvr taa tr or tf tr or tf tce tf vcc(min) gnd vih vil vih vil vih vil vih vil vih vil voh high z vol wp#/acc valid ouput valid address tvcs tr toe tf tr
66 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b min. max. input voltage voltage difference with gnd on wp#/acc, a9, oe, reset# pins -1.0v 10.5v input voltage voltage difference with gnd on all normal pins input -1.0v vcc x 1.5vcc vcc current -100ma +100ma all pins included except vcc. test conditions: vcc = 3.0v, one pin per testing limits parameter min. typ. (1) max. (2) units chip erase time 180 300 sec sector erase time 1 5 sec erase/program cycles 100,000 cycles chip programming time (word mode) 100 350 sec word program time 11 360 us latch-up characteristics erase and programming performance parameter symbol parameter description test set typ max unit cin2 control pin capacitance vin=0 7.5 9 pf cout o utput capacitance vout=0 8.5 12 pf cin input capacitance vin=0 6 7.5 pf tsop pin capacitance notes: 1. typical program and erase times assume the following conditions: 25 c, 3.0v vcc. programming specifications assume checkboard data pattern. 2. maximum values are measured at vcc = 3.0 v, worst case temperature. maximum values are valid up to and including 100,000 program/erase cycles. 3. erase/program cycles comply with jedec jesd-47e & a117a standard.
67 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b ordering information part no. access time ball pitch/ package remark (ns) ball size mx29lv128dttc-90q 90 48 pin tsop pb-free (vcc=3.0v-3.6v) MX29LV128DBtc-90q 90 48 pin tsop pb-free (vcc=3.0v-3.6v) mx29lv128dtt2c-90q 90 56 pin tsop pb-free (vcc=3.0v-3.6v) MX29LV128DBt2c-90q 90 56 pin tsop pb-free (vcc=3.0v-3.6v) mx29lv128dtmc-90q* 90 70 pin ssop pb-free (vcc=3.0v-3.6v) mx29lv128dtti-90q 90 48 pin tsop pb-free (vcc=3.0v-3.6v) MX29LV128DBti-90q 90 48 pin tsop pb-free (vcc=3.0v-3.6v) mx29lv128dtt2i-90q 90 56 pin tsop pb-free (vcc=3.0v-3.6v) MX29LV128DBt2i-90q 90 56 pin tsop pb-free (vcc=3.0v-3.6v) * : advance information
68 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b part name description mx 29 lv 90 d t t c q option: q: lead-free with restricted vcc range: 3.0v~3.6v speed: 90: 90ns temperature range: c: commercial (0? c to 70? c) i: industriall (-40? c to 85? c) package: boot block type: t: top boot b: bottom boot revision: d density & mode: 128: 128m x8/x16 boot block lv: 3v type: device: 29:flash 128 t: 48tsop t2: 56tsop m: 70ssop
69 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b package information
70 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b
71 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b
72 p/n:pm1327 rev. 1.0, sep. 22, 2008 mx29lv128d t/b revision history revision no. description page date 1.0 1. removed "preliminary" p1 sep/22/2008 2. removed 64-fbga package information p1,3,67,68 3. added note for overshoot and undershoot p39
mx29lv128d t/b 73 m acronix i nternational c o., l td . headquarters macronix, int'l co., ltd. 16, li-hsin road, science park, hsinchu, taiwan, r.o.c. tel: +886-3-5786688 fax: +886-3-5632888 macronix america, inc. 680 north mccarthy blvd. milpitas, ca 95035, u.s.a. tel: +1-408-262-8887 fax: +1-408-262-8810 email: sales.northamerica@macronix.com macronix asia limited. nkf bldg. 5f, 1-2 higashida-cho, kawasaki-ku kawasaki-shi, kanagawa pref. 210-0005, japan tel: +81-44-246-9100 fax: +81-44-246-9105 macronix (hong kong) co., limited. 702-703, 7/f, building 9, hong kong science park, 5 science park west avenue, sha tin, n.t. tel: +86-852-2607-4289 fax: +86-852-2607-4229 http : //www.macronix.com macronix international co., ltd. reserves the right to change product and specifications without notice. taipei office macronix, int'l co., ltd. 19f, 4, min-chuan e. road, sec. 3, taipei, taiwan, r.o.c. tel: +886-2-2509-3300 fax: +886-2-2509-2200 macronix europe n.v. koningin astridlaan 59, bus 1 1780 wemmel belgium tel: +32-2-456-8020 fax: +32-2-456-8021 singapore office macronix pte. ltd. 1 marine parade central #11-03 parkway centre singapore 449408 tel: +65-6346-5505 fax: +65-6348-8096 macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of macronix's products in the prohibited applications.

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